Design of High-Power Interleaved Inverters for UPS Applications

The present work aims to provide a distinction between the benefits and disadvantages among the two most common inverter topologies used in UPS systems: the Half-Bridge for a Two-Level VSI and the Neutral Point Clamped-T-Type in a Three-Level configuration. The main aspects investigated are the design of the split capacitor DC Bus and the Output Filter. The latter is arranged in L and LC layouts, both dimensioned at two different switching frequencies of 20 kHz and 10 kHz. To successfully verify the sizing of such components, power quality simulations are carried out to compare and audit the respect of imposed distortion constraints on waveforms. For both the 2-L and 3-L cases, a thermal analysis is also performed to analyze the losses generated by the whole device and its thermal handling capability, both in nominal and in overload conditions to be tested. The purpose of this analysis culminates in the design of the heatsink, whose purpose is to dissipate the heat towards the ambient and guaranteeing the junction temperature of the SiC MOSFETs utilized to stay within the technical safety limits imposed by the devices themselves. The software utilized to perform the simulations is PLECS.