Digital design of an EPC Gen2 controller for enhanced RFID tags

This thesis presents an improvement of the long range battery-less UHF RFID platform for sensor applications which is based on the open source Wireless Identification and Sensing Platform (WISP) project. The purpose of this work is to design a digital logic that performs the RFID EPC gen2 protocol communication, is able to acquire information by sensors and provide an accurate estimation of tag location ensuring low energy consumption. This thesis will describe the hardware architecture on which the digital logic was inserted, the Verilog code developed, the methods by which the digital logic was tested and an explorative study of chip synthesis on Cadence.