Design Approaches for Reliable Fully Integrated Voltage Regulators of High Performance Microprocessors for Highly Autonomous Systems

Parker, Abdul Basit (2021) Design Approaches for Reliable Fully Integrated Voltage Regulators of High Performance Microprocessors for Highly Autonomous Systems. [Laurea magistrale], Università di Bologna, Corso di Studio in Ingegneria elettronica [LM-DM270], Documento ad accesso riservato.
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Abstract

High-performance multi-core processors are fully powered by Fully Integrated Voltage Regulators, which are fully integrated with the microprocessor die and provide power to various domains. The FIVR increases the efficiency of the device while also providing a boost to the available peak power. The FIVR is integrated on the die, and therefore it is also susceptible to faults and aging phenomena. These problems are not tolerable for high reliability applications, such as autonomous self-driving vehicles and in smart factories. The previously developed checker is susceptible to some faults which were not detected. These are called the critical faults and are intolerable. Therefore, two alternate schemes have been developed to detect these faults. In case of failure, the Checker is now able to give an error indication, which can be used to activate recovery procedures. Two solutions have been proposed. The first is a Built-In Self-Test Like scheme that is operated in two modes. The first mode is normal mode where the FIVR Checker operates as normal and detects most faults affecting the FIVR. The second mode is an offline testing mode that detects previously critical faults that are not detected in normal modes. The BIST Scheme was verified with respect to stuck-on transistor, stuck-open transistor and resistive bridging faults and was found to have a high fault coverage. The second scheme is a self-checking checker for the FIVR. This scheme is based on modification of the internal structure of a previously proposed monitor, thus making it completely self-checking. A new Error Indicator is also considered which is totally self-checking. Moreover, the self-checking ability of the scheme was verified with respect to stuck-on transistor, stuck-open transistor and resistive bridging faults, and this scheme was verified to be self-checking for the list of faults considered.

Abstract
Tipologia del documento
Tesi di laurea (Laurea magistrale)
Autore della tesi
Parker, Abdul Basit
Relatore della tesi
Correlatore della tesi
Scuola
Corso di studio
Indirizzo
ELECTRONIC TECHNOLOGIES FOR BIG-DATA AND INTERNET OF THINGS
Ordinamento Cds
DM270
Parole chiave
reliability,checker,FIVR,self-checking
Data di discussione della Tesi
20 Luglio 2021
URI

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