Preliminary studies for a future LHCb upgraded vertex-locator using 4D track reconstruction

This thesis reports a preliminary study aimed at finding realistic solutions for the future Vertex Locator of the LHCb experiment in the harsh scenario imposed by the High Luminosity phase of the Large Hadron Collider (LHC). One of these possible solutions to cope with a high-multiplicity-track environment is the introduction of the time information associated with hits on pixels. The addition of the fourth coordinate, the time, will improve the efficiency of track and primary vertices reconstruction, reducing the rate of the fast tracker. The impact of the time information is evaluated in the present work through a simulation. The fast simulation developed is based on the Upgrade-I detector geometry. It has been validated with a full, official, LHCb simulation. Differently from the latter, fast simulation has the advantages to be quicker and versatile, to cope with higher rates of Upgrade-II conditions. This work here presented is done in collaboration with the INFN project TimeSpot, which is developing a promising silicon sensor with a time resolution of O(30ps). Because of the high data-rate and the demand for real-time devices, FPGA solution is a possible candidate for clustering and real-time track reconstruction at read-out level, due to its high predisposition to perform easy and repetitive processes in a highly parallelized form. Since FPGAs receives in input binary data, a raw bank data-format is implemented in the fast simulation. Each raw bank encodes active pixels information of a detector sensor. Once this information is processed, FPGAs will reconstruct tracks from the hits in a parallel way. In conclusions, the thesis work here presented shows, trough simulation studies, that the time information in a pixel sensor, with a resolution of about 30 ps, will be necessary to achieve similar performance like the VeloPixel will do in the coming years.