AccaSim++: An Extensible HPC Workload Management Simulator

High-Performance Computing workload-management research demands simulation tools extensible enough to absorb new research directions without invasive code modifications, and reproducible enough to support controlled, comparable experimental studies. AccaSim is an openly available trace-driven discrete-event simulator for HPC job-dispatching research. Its architecture, however, conflates stable simulation mechanisms with variable domain logic such as scheduling policies and allocation strategies, making each new contribution require modifying core code rather than extending through well-defined interfaces. This encourages extension-by-fork, a pattern that fragments the research ecosystem and undermines cross-study comparability. This thesis re-engineers AccaSim into AccaSim++, a microkernel-based simulator in which a compact kernel is explicitly separated from pluggable domain components through a governed plugin system. The kernel handles exclusively Future Event List management, clock advancement, deterministic event ordering, and cancellation semantics. All HPC-specific behaviour is externalised behind typed interfaces and loaded through a configuration-driven plugin lifecycle, transforming extension practice from "fork-and-modify" to "configure-and-compose'". Functional continuity with baseline AccaSim is preserved as a hard constraint, validated through schedule-equivalence verification and systematic performance benchmarking. Two domain extensions --- energy and carbon-aware scheduling, and ML-based runtime estimation --- are developed as case studies, both integrated entirely through the plugin boundary without any kernel modification. The central contribution is a research platform whose architecture makes the boundary between stable mechanisms and variable policy explicit, auditable, and enforced, so that future research can accumulate on a shared foundation rather than repeatedly rewriting the same infrastructure.